Teaching at BUBT

• Textbook:
  1. Fundamentals of Electric Circuits [7^th ed.]
     Author: Charles K. Alexander, Matthew N.O. Sadiku
  2. Introductory Circuit Analysis [13^th ed.]
     Author: Robert L. Boylestad
• Syllabus:
  • Ch. 1: Basic Concepts [Text1]
    • SI Units, Charge, Current, Voltage, Power, Energy, Circuit Elements
  • Ch. 2: Basic Laws [Text1]
    • Ohm’s Law, Nodes, Branches, Loops, Kirchhoff’s Laws, Series & Parallel Resistors, Voltage & Current Division, Wye-Delta Transformations
  • Ch. 3: Methods of Analysis [Text1]
    • Nodal Analysis, Supernode, Mesh Analysis, Supermesh
  • Ch. 4: Circuit Theorems [Text1]
    • Linearity, Superposition, Source Transformation, Thevenin’s Theorem, Norton’s Theorem, Maximum Power Transfer
  • Ch. 6: Capacitors and Inductors [Text1]
    • Series & Parallel Capacitors & Inductors
  • Ch. 7: First-Order Circuits [Text1]
    • Source-Free RC & RL Circuits, Singularity Functions, Step Response of RC & RL Circuits
  • Ch. 11: Magnetic Circuits [Text2]
    • Magnetic Fields, Flux Density, Permeability, Reluctance, Ohm’s Law for Magnetic Circuits, Ampere’s Circuital Law, Series & Parallel Magnetic Circuits
• Similar course conducted:
  • EEE 101: Electrical Technology (Dept. of CSE)
  • EEE 201: Elements of Electrical Eng. & Electronics (Dept. of Textile Eng.)

• Textbook:
  1. Fundamentals of Electric Circuits [7^th ed.]
     Author: Charles K. Alexander, Matthew N.O. Sadiku
  2. Introductory Circuit Analysis [13^th ed.]
     Author: Robert L. Boylestad
• Syllabus:
  • to be updated

• Textbook:
  1. Digital Signal Processing [4^th ed.]
     Author: John G. Proakis, Dimitris G. Manolakis
  2. Discrete-Time Signal Processing [3^rd ed.]
     Author: Alan V. Oppenheim, Ronald W. Schafer
  3. The Scientist and Engineer’s Guide to Digital Signal Processing [2^nd ed.]
     Author: Steven W. Smith
• Syllabus:
  • Basic Concept
    • Signals, Sampling, Nyquist’s Sampling Theorem, Systems
  • Properties of DT Systems
    • Memory, Linearity, Time-Invariance, Stability, Causality
  • Convolution & Correlation
    • Convolution Sum Formula, Auto & Cross-correlation
  • Quantization
    • Uniform Rounding & Truncation, SQNR for Uniform Rounding
  • LCCDE
    • Introduction to Linear Constant-Coefficient Difference Equation, Homogenous & Particular Solution to LCCDE
  • DTFT & IDTFT
    • Existence, Spectra, Properties
  • DFT
    • Difference with DTFT, N-point DFT
  • z-Transform
    • Existence, ROC, Properties, Poles & Zeros for Rational z-Transform, Time-Domain Behavior with Pole Location, Inverse z-Transform, System Function, Causality & Stability, Pole-Zero Cancellation
  • Digital Filter
    • Time- & Frequency-Domain Parameters, MA Filter, Windowed-Sinc Filter (Hamming vs Blackman vs Kaiser), IIR Filter, Phase Response (IIR vs FIR)

• Textbook:
  • CMOS VLSI Design: A Circuits and Systems Perspective [4^th ed.]
    Author: Neil H. E. Weste, David M. Harris
• Syllabus:
  • Ch. 1: Introduction
    • MOS Transistors
    • CMOS Logic: INV, NAND, NOR, Compound Gates, Pass Transistors & Transmission Gates, Tristates, MUX, Sequential Circuits
    • Fabrication & Layout: INV Cross-Section, Fab Process, Layout Design Rules, Stick Diagrams
    • Design Partitioning: Design Abstractions, Structured Design, Gajski-Kuhn Chart
  • Ch. 2: MOS Transistor Theory
    • Long-Channel I-V Characteristics
    • C-V Characteristics: Simple MOS Capacitance
    • Nonideal I-V Effects: Mobility Degradation & Velocity Saturation, Channel Length Modulation, Threshold Voltage Effects, Leakage, Temperature & Geometry Dependence
    • DC Transfer Characteristics: Static CMOS INV, Beta Ratio, Noise Margin, Pass Transistor
  • Ch. 4: Delay
    • Transient Response
    • RC Delay Model: Effective Resistance, Gate & Diffusion Capacitance, Equivalent RC Circuits, Elmore Delay, Layout Dependence of Capacitance
    • Linear Delay Model: Logical Effort, Parasitic Delay
    • Logical Effort of Paths
  • Ch. 5: Power
    • Dynamic Power: Activity Factor, Capacitance, Voltage, Frequency, Short-Circuit Current, Resonant Circuits
    • Static Power: Static Power Sources, Power Gating, Multiple Threshold Voltages & Oxide Thicknesses, Variable Threshold Voltages, Input Vector Control
  • Ch. 7: Robustness
    • Variability: Supply Voltage, Temperature, Process Variation, Design Corners
    • Reliability: Oxide & Interconnect Wearout, Soft Errors, Overvoltage Failure, Latchup
    • Scaling: Transistor & Interconnect Scaling, ITRS, Impacts on Design
  • Ch. 9: Combinational Circuit Design
    • Circuit Families: Static CMOS, Ratioed Circuits, CVSL, Dynamic Circuits, Pass-Transistor Circuits

• Textbook:
  • Control Systems Engineering [8^th ed.]
    Author: Norman S. Nise
• Syllabus:
  • Ch. 1: Introduction
    • System Configurations, Analysis & Design Objectives
  • Ch. 2: Modeling in Frequency-Domain
    • Laplace Transform, TF, Electrical Network, Mechanical System: Translational & Rotational, Systems with Gears
  • Ch. 3: Modeling in Time-Domain
    • State-Space Representation, Conversion between TF & SS
  • Ch. 4: Time Response
    • Poles & Zeros, 1st-Order Systems, 2nd-Order Systems, Response with Additional Po
  • Ch. 5: Reduction of Multiple Subsystems
    • Block Diagrams, Analysis & Design of Feedback Systems, SFG, Mason’s Rule, SFG of SS, Alternative Representations in SS
  • Ch. 6: Stability
    • Routh-Hurwitz Criterion
  • Ch. 7: Steady-State Errors
    • SSE for Unity & Nonunity Feedback Systems, Static Error Constants & System Type
  • Ch. 8: Root Locus Techniques
    • Properties, Sketching & Refining

• Textbook:
  1. CMOS VLSI Design: A Circuits and Systems Perspective [4^th ed.]
     Author: Neil H. E. Weste, David M. Harris
  2. Contemporary Logic Design [2^nd ed.]
     Author: Randy H. Katz, Gaetano Borriello
  3. MIT 6.111 [Lec. 06]
     Introductory Digital Systems Laboratory (Fall 2019)
• Syllabus:
  • Ch. 7: Robustness [Text1]
    • Variability: Supply Voltage, Temperature, Process Variation, Design Corners
    • Reliability: Oxide & Interconnect Wearout, Soft Errors, Overvoltage Failure, Latchup
    • Scaling: Transistor & Interconnect Scaling, ITRS, Impacts on Design
    • Statistical Analysis of Variability: Random Variables, Sources, Impacts
  • Ch. 9: Combinational Circuit Design [Text1]
    • Circuit Families: Static CMOS, Ratioed Circuits, CVSL, Dynamic Circuits, Pass-Transistor Circuits
    • Circuit Pitfalls: Threshold Drops, Ratio Failures, Leakage, Charge Sharing, Power Supply Noise, Hot Spots, Minority Carrier Injection, Back-Gate Coupling, Diffusion Input Noise Sensitivity, Process Sensitivity
  • Ch. 10: Sequential Circuit Design [Text1]
    • Sequencing Static Circuits: Sequencing Methods, Max-Delay Constraints, Min-Delay Constraints, Time Borrowing, Clock Skew
    • Circuit Design of Latches & Flip-Flops: Conventional CMOS Latches & Flip-Flops, Pulsed Latches, Resettable & Enabled Latches & Flip-Flops, Incorporating Logic into Latches
    • Synchronizers: Metastability, Arbiters
  • Ch. 11: Datapath Subsystems [Text1]
    • Addition: Single-Bit Addition, CPA (RCA, Carry-Skip, CLA, Carry-Select), Multiple-Input Addition (CSA)
    • Subtraction, 1/0 Detectors, Comparators
    • Counters: Binary Counters, LFSR
    • Multiplication: Unsigned Array, Booth Encoding
  • Ch. 12: Array Subsystems [Text1]
    • SRAM: 6T Cells (R/W, Physical Design), Row & Column Circuitry
    • DRAM
    • ROM: Programmable, NAND, Flash
    • PLA
  • Ch. 7: Finite State Machines [Text2] [Text3]
    • Concept of SM
    • Design Approach: Moore vs Mealy

• Software: MATLAB
• Labs:
  1. Sampling & Quantization
     • Analog vs DT Signal
     • Sampling of Analog Signal
     • Reconstruction of Signal from Samples
     • Uniform Quantization of Sampled Signal
     • SQNR for Quantization
  2. Time-Domain Analysis of DT Signals & Systems
     • Impulse, Step, Ramp
     • Addition of Sequences
     • Upsampling & Downsampling
     • Even & Odd Part of a Sequence
     • Convolution, Autocorrelation, Cross-correlation
  3. z-Transform
     • z-T of Finite- & Infinite-Duration Sequence,
     • Convolution Property
     • Partial-Fraction Expansion
     • Inverse z-T
     • Impulse Response from TF
     • Pole-Zero Plot
     • Pole-Zero Cancellation
  4. Frequency-Domain Analysis of DT Signals & Systems
     • DTFT Spectra: Magnitude & Phase
     • Reconstruction of DT Sequence using IDTFT
     • FFT
     • Linear & Circular Convolution using FFT
  5. Digital FIR Filter
     • Window: Rect, Bartlett, Hanning, Hamming, Blackman, Kaiser
     • Parks-McClellan Algorithm
     • LPF of Given Specifications using Kaiser Window

• Software: Tanner EDA (recommended), Xilinx Vivado (recommended), DSCH, Microwind
• Hardware: Basys 3 Artix-7 FPGA
• HDL: Verilog
• Labs: Schematic, Layout, FPGA programming
  • INV
  • NAND2, NOR3
  • NAND3, NOR3
  • AOI-22
  • OAI-31
  • OAI-22
  • 2:1 MUX using Tristate INV pair
  • XOR2
  • Full Adder (mirror topology)
  • 4-bit RCA

Note: Verilog is extensively covered in EEE 446. Simple Verilog constructs are shown in EEE 330 for programming the FPGA only. It is not included in the lab-final.

• Software: MATLAB
• Labs:
  1. Poles, Zeros and Gain Values from TF
  2. Step & Impulse Response for Generalized 1st-Order System
  3. Step & Impulse Response for Generalized 2nd-Order System
  4. Effect of Addition of Poles to the TF of 2nd-Order System
  5. Effect of Addition of Zeros to the TF of 2nd-Order System
  6. Block Diagram Reduction of Linear Systems
  7. Effect of P, PI, PD, and PID Controller on Closed-Loop System
  8. Modeling of Physical Systems: Mechanical or Electrical Network [Simulink]
  9. P, PI, PD, and PID Controller [Simulink]
  10. Root Locus
  11. Conversion between SS Representation & TF
  12. Routh–Hurwitz Stability Criterion

• Software: Xilinx Vivado (recommended), Questa-Intel
• Hardware: Basys 3 Artix-7
• HDL: Verilog
• Labs:
  • Review of Layout [EEE 330]
  • Verilog Constructs
  • Concurrent Functionality
    • Operators
    • Continuous Assignment: SOP, POS, Encoder, Decoder, MUX, DEMUX, 7-seg
  • Sequential Functionality
    • Procedural Assignment
    • Constructs: if-else, case(x/z), loops
  • Sequential Storage & Registers
    • D-Latch
    • D-Flip-Flop: reset, preset, enable
    • Register: enable
    • Shift Register
  • FSM